Suggestion
Theoretical impact, if target counter could be changed by -0.2
| Counter | Score | runtime | power_sys | power_cpu | power_mem | Description |
|---|---|---|---|---|---|---|
| PAPI_LD_INS | -18.02% | -8.65% | -3.63% | -5.74% | 0.00% | Load instructions |
| PAPI_RES_STL | -3.03% | -6.78% | +0.22% | +0.17% | +3.36% | Cycles stalled on any resource |
| PAPI_VEC_INS | -0.89% | -0.04% | -0.33% | -0.51% | -0.00% | Vector/SIMD instructions (could include integer) |
| PAPI_L1_DCM | -0.84% | -0.04% | -0.31% | -0.48% | -0.00% | Level 1 data cache misses |
| PAPI_L1_STM | -0.82% | -0.04% | -0.30% | -0.47% | -0.00% | Level 1 store misses |
| PAPI_BR_MSP | +1.76% | +5.66% | -0.25% | -0.20% | -3.46% | Conditional branch instructions mispredicted |
| PAPI_BR_NTK | +1.77% | +5.64% | -0.25% | -0.20% | -3.43% | Conditional branch instructions not taken |
| PAPI_SR_INS | +2.67% | +6.67% | -0.21% | -0.17% | -3.62% | Store instructions |