Suggestion
Theoretical impact, if target counter could be changed by -0.2
| Counter | Score | runtime | power_sys | power_cpu | power_mem | Description |
|---|---|---|---|---|---|---|
| PAPI_RES_STL | -49.78% | -5.95% | -14.09% | -13.24% | -16.50% | Cycles stalled on any resource |
| PAPI_BR_NTK | -13.59% | -4.34% | -2.95% | -3.04% | -3.26% | Conditional branch instructions not taken |
| PAPI_L1_ICM | -13.27% | -4.16% | -2.90% | -3.02% | -3.18% | Level 1 instruction cache misses |
| PAPI_VEC_INS | -9.13% | -4.18% | -1.32% | -0.66% | -2.97% | Vector/SIMD instructions (could include integer) |
| PAPI_BR_MSP | -7.42% | -2.07% | -1.44% | -0.75% | -3.15% | Conditional branch instructions mispredicted |
| PAPI_FML_INS | -7.27% | -5.68% | -0.82% | -0.77% | 0.00% | Floating point multiply instructions |
| PAPI_FP_INS | -7.25% | -5.66% | -0.83% | -0.77% | 0.00% | Floating point instructions |
| PAPI_HW_INT | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | Hardware interrupts |
| PAPI_SR_INS | +36.03% | +4.76% | +10.24% | +9.78% | +11.26% | Store instructions |
| PAPI_FDV_INS | +39.33% | +4.82% | +11.41% | +11.14% | +11.97% | Floating point divide instructions |