Suggestion
Theoretical impact, if target counter could be changed by -0.2
Counter | Score | runtime | power_sys | power_cpu | power_mem | Description |
---|---|---|---|---|---|---|
PAPI_CA_CLN | -7.94% | 0.00% | -2.87% | -3.74% | -1.33% | Requests for exclusive access to clean cache line |
PAPI_L2_ICA | -7.41% | -1.29% | -2.41% | -3.19% | -0.52% | Level 2 instruction cache accesses |
PAPI_BR_TKN | -7.07% | 0.00% | -2.42% | -3.15% | -1.50% | Conditional branch instructions taken |
PAPI_RES_STL | -6.97% | 0.00% | -2.87% | -3.80% | -0.29% | Cycles stalled on any resource |
PAPI_TLB_IM | -6.23% | -5.76% | -0.18% | -0.29% | 0.00% | Instruction translation lookaside buffer misses |
PAPI_L1_DCM | -6.02% | -5.59% | -0.16% | -0.26% | 0.00% | Level 1 data cache misses |
PAPI_L3_TCM | -5.02% | 0.00% | -1.69% | -2.06% | -1.27% | Level 3 cache misses |
PAPI_L2_LDM | -3.81% | -3.81% | 0.00% | 0.00% | 0.00% | Level 2 load misses |
PAPI_BR_NTK | -1.91% | -1.48% | 0.00% | 0.00% | -0.43% | Conditional branch instructions not taken |
PAPI_CA_SHR | -0.30% | -0.30% | 0.00% | 0.00% | 0.00% | Requests for exclusive access to shared cache line |